Non-volatile latch using Magneto-Electric and Ferro-Electric Tunnel Junctions

Description:

Two memory structures under development in the Nanoelectronics Research Initiative (NRI) of the Semiconductor Research Corporation (SRC) show promise for low power, small area, high performance non-volatile memory devices. However, these will not operate in conjunction with conventional CMOS directly. This invention describes circuit configurations that allow such interfacing.

6933

Patent Information:
Category(s):
Electronics
Engineering
For Information, Contact:
Rupal Desai
Commercialization Manager
University at Buffalo
716-645-8140
rdesai@buffalo.edu
Inventors:
Jonathan Bird (ub)
Uttam Singisetti (ub)
Andrew Marshall (Non-Ub)
Keywords:
Technology
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